# BASEstartm Classic DAS
for Allen-Bradley
INTERCHANGEtm Software
Installation and User's Guide

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# Appendix A
Allen-Bradley PLC-5/250 Addressing

Table A-1 provides the addressing mnemonics for Allen-Bradley PLC-5/250 models.

Table A-1 Supported PLC-5 / 250 Addresses and Data Types
Data Section | PLC Address Format | PLC Format | Byte Size
--- | --- | --- | ---
Outputs | $O:000/000 - $O377/15 | Unsigned Word | 2
Inputs | $I000/00 - $I377/15 | Unsigned Word | 2
Forced internal Storage | $IS:000 - $IS:777 | Signed Word | 2
Binary | $nB0000:0000/00 - $nB9999:9999/15 | Signed Word | 2
Integer | $nN0000:0000/00 - $nN9999:9999/15 | Signed word | 2
Long Integer | $nL0000:0000/00 - $nL9999:9999/15 | Signed long | 4
Floating point | $nF0000:0000/00 - $nF9999:9999/15 | Floating Point 1 | 4
Addapter Status | $AS00:0,1,2,3 - $AS37:0,1,2,3 | Structure | 4
System Public Status | $0S:0 - $0S:350 | Word | 2
Module Public Status | $nS:0 - $nS:20 | Word | 2
Timer structure | $nT0000:0000/00 - $nT9999:9999/15
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.TT | Timing | Bit
.DN | Done | Bit
.PRE | Preset Value | Long
.ACC | Accumulated Value | Long
| Structure | 12
Counter Structure | $nC0000:0000/00 - $nC9999:9999/15
Mnemonic | Instruction | Type
--- | --- | ---
.CU | Up Enable | Bit
.CD | Down Enable | Bit
.DN | Done | Bit
.OV | Overflow | Bit
.UN | Underflow | Bit
.PRE | Preset Value | Word
.ACC | Accumulated Value | Word
| Structure | 6
String | $nST0000:0000/00 - $nST9999:9999/15
Mnemonic | Instruction | Type
--- | --- | ---
.LEN | Length | Word
.DATA[] | Position | 82 Bytes
| Structure 2 | 84
Control | $nR0000:0000/00 - $nR9999:9999/15
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.WU | Enable Unloading | Bit
.DN | Done | Bit
.EM | Empty | Bit
.ER | Error | Bit
.UL | Unload | Bit
.IN | Inhibit Comparisons | Bit
.FD | Found | Bit
.LEN | Length | Word
.POS | Position | word
| Structure | 6
Message Control | $nMSG0000:0000 - $nMSG9999:9999/15
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.ST | Start Transmision | Bit
.AD | Asynchronous Done | Bit
.AE | Asynchronous Error | Bit
.CO | Continuous | Bit
.EW | Enabled Waiting | Bit
.DN | Done | Bit
.ER | Error | Bit
.ERR | Error Code | Word
.RLEN | Requested Length | Word
.DLEN | Done Length | Word
.DATA | Reserved/Interim Use | 52 Words
| Structure | 112
PID Control | $nPD0000:0000/00 - $nPD9999:9999/15
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.CT | Cascaded Type | Bit
.CL | Cascaded Loop | Bit
.PVT | PV Tracking | Bit
.DO | Derivative Of | Bit
.SWM | Software A/M Mode | Bit
.CA | Control Action | Bit
.MO | Mode | Bit
.PE | PID Equation | Bit
.INI | PID Initialized | Bit
.SPOR | SP Out of Range | Bit
.OLL | Output Limit Low | Bit
.OLH | Output Limit High | Bit
.EWD | Error Within Deadband | Bit
.DVNA | Deviation High Alarm | Bit
.DVPA | Deviation Low Alarm | Bit
.PVLA | PV Low Alarm | Bit
.PVHA | PV High Alarm | Bit
| Structure | 164
PID Control | $nPD0000:0000/00 - $nPD9999:9999/15
Mnemonic | Instruction | Type
--- | --- | ---
.SP | Setpoint | Floating
.KP | Proportional Gain | Floating
.KI | Integral Gain | Floating
.KD | Derivative Time | Floating
.BIAS | Output Bias % | Floating
.MAXS | Setpoint Maximum | Floating
.MINS | Setpoint Minimum | Floating
.DB | Deadband | Floating
.SO | Set Output % | Floating
.MAXO | Output Limit High % | Floating
.MINO | Output Limit Low % | Floating
.UPD | Update Time | Floating
.PV | Process Variable | Floating
.ERR | Error | Floating
.OUT | Output | Floating
.PVH | PV Alarm High | Floating
.PVL | PV Alarm Low | Floating
.DVP | Deviation Alarm + | Floating
.DVN | Deviation Alarm - | Floating
.PVDB | PV Deadband | Floating
.MAXI | Input Range Maximum | Floating
.MINI | Input Range Minimum | Floating
.TIE | Tieback % | Floating
.ADDR | Address of Master Loop % | bytes
.DVDB | Deviation Alarm Deadband | Floating
.DATA[] | Reserved/Interim Use | 14 Floating
| Structure | 164

1In IEEE 32 bit floating point format.
2Data in the .DATA portion of the structure is byte swaped.

# Appendix B
Allen-Bradley PLC-5 Family Addressing

Table B-1 provides the addressing mnemonics for Allen-Bradley PLC-5 family models.

Table B-1 Supported PLC-5 Family Addresses and Data Types
Data Section | PLC Address Format | PLC Format | Byte Size
--- | --- | --- | ---
Outputs | $O0/0 - $O37/17 ($O277/17 for new models) | Unsigned Word | 2
Inputs | $I0/0 - $I37/17 ($I1277/17 for new models) | Unsigned Word | 2
ASCII 2 | $A:3/0 - $A999:999/15 | Signed Word | 2
BCD | $D?:0/0 - $D999:999/15 | Signed Word | 2
Binary | $B3:0/0 - $B999:999/15 | Signed Word | 2
Integer | $N7:0/0 - $N999:999/15 | Signed word | 2
Floating point | $F8:0/0 - $F999:999/15 | Floating Point 1 | 4
System Public Status | $S:0/0 - $S:128/15 | Word | 2
Timer structure | $T4:0 - $T999:999
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.TT | Timing | Bit
.DN | Done | Bit
.PRE | Preset Value | Word
.ACC | Accumulated Value | Word
| Structure | 6
Counter Structure | $C5:0 - $C999:999
Mnemonic | Instruction | Type
--- | --- | ---
.CU | Up Enable | Bit
.CD | Down Enable | Bit
.DN | Done | Bit
.OV | Overflow | Bit
.UN | Underflow | Bit
.PRE | Preset Value | Word
.ACC | Accumulated Value | Word
| Structure | 6
Control | $R6:0 - $R999:999
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.EU | Enable Unloading | Bit
.DN | Done | Bit
.EM | Empty | Bit
.ER | Error | Bit
.UL | Unload | Bit
.IN | Inhibit Comparisons | Bit
.FD | Found | Bit
.LEN | Length | Word
.POS | Position | word
| Structure | 6
Message 2 | $MG9:0 - $MG999:584
Mnemonic | Instruction | Type
--- | --- | ---
.NR | No Response | Bit
.EN | Enable | Bit
.TO | Timeout | Bit
.ST | Start | Bit
.AD | Async done | Bit
.AE | Async error | Bit
.CO | Continuous | Bit
.EW | Enable waiting | Bit
.DN | Done | Bit
.ER | Error | Bit
.ERR | Error | Word
.RLEN | Receive length | Word
.DLEN | Done length | Word
| Structure | 112
PID Control 2 | $PD9:000 - $PD999:398
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.CT | Cascaded Type | Bit
.CL | Cascaded Loop | Bit
.PVT | PV Tracking | Bit
.DO | Derivative Of | Bit
.SWM | Software A/M Mode | Bit
.CA | Control Action | Bit
.MO | Mode | Bit
.PE | PID Equation | Bit
.INI | PID Initialized | Bit
.SPOR | SP Out of Range | Bit
.OLL | Output Limit Low | Bit
.OLH | Output Limit High | Bit
.EWD | Error Within Deadband | Bit
.DVNA | Deviation High Alarm | Bit
.DVPA | Deviation Low Alarm | Bit
.PVLA | PV Low Alarm | Bit
.PVHA | PV High Alarm | Bit
| Structure | 164
PID Control 2 | $PD9:000 - $PD999:398
Mnemonic | Instruction | Type
--- | --- | ---
.SP | Setpoint | Floating
.KP | Proportional Gain | Floating
.KI | Integral Gain | Floating
.KD | Derivative Time | Floating
.BIAS | Output Bias % | Floating
.MAXS | Setpoint Maximum | Floating
.MINS | Setpoint Minimum | Floating
.DB | Deadband | Floating
.SO | Set Output % | Floating
.MAXO | Output Limit High % | Floating
.MINO | Output Limit Low % | Floating
.UPD | Update Time | Floating
.PV | Process Variable | Floating
.ERR | Error | Floating
.OUT | Output | Floating
.PVH | PV Alarm High | Floating
.PVL | PV Alarm Low | Floating
.DVP | Deviation Alarm + | Floating
.DVN | Deviation Alarm - | Floating
.PVDB | PV Deadband | Floating
.MAXI | Input Range Maximum | Floating
.MINI | Input Range Minimum | Floating
.TIE | Tieback % | Floating
.ADDR | Address of Master Loop % | bytes
.DVDB | Deviation Alarm Deadband | Floating
.DATA | Reserved/Interim Use | 14 Floating
| Structure | 164
SFC status 2 | $SC9:0/0 - $SC999:999/15
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.SA | Scan active | Bit
.FS | First Scan | Bit
.LS | Last Scan | Bit
.OV | Timer overflow | Bit
.ER | Step errored | Bit
.TIM | Active Time | Word
.PRE | Preset Value | Word
| Structure | 6
String | $ST0:0 - $ST999:779
Mnemonic | Instruction | Type
--- | --- | ---
.LEN | Length | Word
.DATA | Position | 82 Bytes
| Structure 2 | 84

1In IEEE 32 bit floating point format.
2Not supported on PLC-5/10, -5/12, -5/15, -5/25 models.

# Appendix C
Allen-Bradley SLC Family Addressing

Table C-1 provides the addressing mnemonics for Allen-Bradley SLC family models.

Table C-1 Supported SLC Family Addresses and Data Types
Data Section | PLC Address Format | PLC Format | Byte Size
--- | --- | --- | ---
Outputs | $O0.0/0 - $O30.255/15 | Unsigned Word | 2
Inputs | $I0.0/0 - $I30.255/15 | Unsigned Word | 2
ASCII 1 | $A:?/0 - $A255:255/15 | Signed Word | 2
BCD | $D?:0/0 - $D255:255/15 | Signed Word | 2
Binary | $B3:0/0 - $B255:255/15 | Signed Word | 2
Integer | $N7:0/0 - $N255:255/15 | Signed word | 2
Floating point 2 | $F8:0/0 - $F255:255/15 | Floating Point 1 | 4
System Status | $S:0/0 - $S:? 3/15 | Word | 2
Timer structure | $T4:0 - $T255:255
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.TT | Timing | Bit
.DN | Done | Bit
.PRE | Preset Value | Word
.ACC | Accumulated Value | Word
| Structure | 6
Counter Structure | $C5:0 - $C255:255
Mnemonic | Instruction | Type
--- | --- | ---
.CU | Up Enable | Bit
.CD | Down Enable | Bit
.DN | Done | Bit
.OV | Overflow | Bit
.UN | Underflow | Bit
.UA 4 | Update Accumulator | Bit
.PRE | Preset Value | Word
.ACC | Accumulated Value | Word
| Structure | 6
Control | $R6:0 - $R255:255
Mnemonic | Instruction | Type
--- | --- | ---
.EN | Enable | Bit
.EU | Enable Unloading | Bit
.DN | Done | Bit
.EM | Empty | Bit
.ER | Error | Bit
.UL | Unload | Bit
.IN | Inhibit Comparisons | Bit
.FD | Found | Bit
.LEN | Length | Word
.POS | Position | word
| Structure | 6
String 1 | $ST0:0 - $ST999:779
Mnemonic | Instruction | Type
--- | --- | ---
.LEN | Length | Word
.DATA | Position | 82 Bytes
| Structure | 84

1Not available on SLC 500, SLC 5/01, SLC 5/02 and SLC 5/03 processors.
2In IEEE 32 bit floating point format.
3Processor dependent.
4Available only in SLC 500 fixed style processors equipped with a High Speed Counter.

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