DECevent V2.6 ******************************** ENTRY 4 ******************************** Logging OS 2. Digital UNIX System Architecture 2. Alpha Event sequence number 2. Timestamp of occurrence 26-JAN-1999 15:41:10 Host name CS01 System type register x00000016 Alpha 4000/1200 Series Number of CPUs (mpnum) x00000002 CPU logging event (mperr) x00000000 Event validity 1. O/S claims event is valid Event severity 1. Severe Priority Entry type 100. CPU Machine Check Errors CPU Minor class 2. 660 Entry Software Flags x0000002300000000 IOD 0 Register Subpkt Pres IOD 1 Register Subpkt Pres PCI 1 Bus Snapshot Present Active CPUs x00000003 Hardware Rev x00000000 System Serial Number NI83909287 Module Serial Number Module Type x0000 System Revision x00000000 * MCHK 660 Regs * Flags: x00000000 PCI Mask x0002 Machine Check Reason x0202 IOD-Detected Hard Error -OR- DTag Parity Error (If Cached CPU) PAL SHADOW REG 0 x0000000000000000 PAL SHADOW REG 1 x0000000000000000 PAL SHADOW REG 2 x0000000000000000 PAL SHADOW REG 3 x0000000000000000 PAL SHADOW REG 4 x00004B3500000000 PAL SHADOW REG 5 x0000000000000000 PAL SHADOW REG 6 x0000000000000000 PAL SHADOW REG 7 x0000000000000000 PALTEMP0 x0000000000000000 PALTEMP1 x0000000000000000 PALTEMP2 xFFFFFC000052D5F0 PALTEMP3 x0000000000004400 PALTEMP4 x0000000000000000 PALTEMP5 x0000000000000001 PALTEMP6 x000000000000002A PALTEMP7 xFFFFFC000052CF10 PALTEMP8 x1F1E171515020100 PALTEMP9 xFFFFFC000052D330 PALTEMP10 xFFFFFC00002910F4 PALTEMP11 xFFFFFC000052D190 PALTEMP12 xFFFFFC000052D560 PALTEMP13 x0000000000006E80 PALTEMP14 x0000000000000000 PALTEMP15 x00000000000F0000 PALTEMP16 x0000020306600001 PALTEMP17 x0000000000000000 PALTEMP18 x0000000000000000 PALTEMP19 xFFFFFFFFB68579D8 PALTEMP20 x0000000000CA0000 PALTEMP21 xFFFFFC000052D590 PALTEMP22 xFFFFFC000072B310 PALTEMP23 x000000007FBA9A38 Exception Address Reg xFFFFFC00002910F4 Native-mode Instruction Exception PC x3FFFFF00000A443D Exception Summary Reg x0000000000000000 Exception Mask Reg x0000000000000000 PAL Base Address Reg x0000000000014000 Base Addr for PALcode: x0000000000000005 Interrupt Summary Reg x0000000000200000 External HW Interrupt at IPL21 AST Requests 3-0: x0000000000000000 IBOX Ctrl and Status Reg x000000C160020000 Timeout Counter Bit Clear. IBOX Timeout Counter Enabled. Floating Point Instructions will Cause FEN Exceptions. PAL Shadow Registers Enabled. Correctable Error Interrupts Enabled. ICACHE BIST (Self Test) Was Successful. TEST_STATUS_H Pin Asserted Icache Par Err Stat Reg x0000000000000000 Dcache Par Err Stat Reg x0000000000000000 Virtual Address Reg xFFFFFFFF802BD780 Memory Mgmt Flt Sts Reg x0000000000014E50 If Err, Reference Resulted in DTB Miss Fault Inst RA Field: x0000000000000019 Fault Inst Opcode: x0000000000000029 Scache Address Reg xFFFFFF000001904F Scache Status Reg x0000000000000000 Bcache Tag Address Reg xFFFFFF804B4CEFFF Last Bcache Access Resulted in a Miss. Value of Parity Bit for Tag Control Status Bits Dirty, Shared & Valid is Set. Value of Tag Control Dirty Bit is Set. Value of Tag Control Shared Bit is Set. Value of Tag Control Valid Bit is Clear. Value of Parity Bit Covering Tag Store Address Bits is Clear. Tag Address<38:20> Is: x00000000000004B4 Ext Interface Address Reg xFFFFFF007C00000F Fill Syndrome Reg x0000000000000C00 Ext Interface Status Reg xFFFFFFF005FFFFFF Error Occurred During D-ref Fill LD LOCK xFFFFFF007F946C4F ** IOD SUBPACKET -> ** IOD 0 Register Subpacket WHOAMI x000006FA Module Revision 1. VCTY ASIC Rev = 1 Bcache Size = 4MB CPU = 0 This Bus Bridge Phy Addr x000000F9E0000000 IOD# 0 Dev Type & Rev Register x06008332 CAP Chip Revision: x00000002 B3040 Revision: x00000003 B3050 Revision: x00000003 AlphaServer 4100 MC-PCI Command Register x46480FF1 Module Self-Test Passed LED On. Delayed PCI Bus Reads Protocol: Enabled Bridge to PCI Transactions: Enabled Bridge REQUESTS 64 Bit Data Transactions Bridge ACCEPTS 64 Bit Data Transactions PCI Address Parity Check: Enabled MC Bus CMD/Addr Parity Check: Enabled MC Bus NXM Check: Enabled Check ALL Transactions for Errors Use MC_BMSK for 16 Byte Align Blk Mem Wrt Wrt PEND_NUM Threshold: 8. RD_TYPE Memory Prefetch Algorithm: Short RL_TYPE Mem Rd Line Prefetch Type: Medium RM_TYPE Mem Rd Multiple Cmd Type: Long ARB_MODE PCI Arbitration: Round Robin Mem Host Address Ext Reg x00000000 HAE Sparse Mem Adr<31:27> x00000000 IO Host Adr Ext Register x00000000 PCI Upper Adr Bits<31:25> x00000000 Interrupt Ctrl Register x00000003 Write Device Interrupt Info Struct:Enabled Interrupt Request x00000000 Interrupts asserted x00000000 Interrupt Mask0 Register x00C50000 Interrupt Mask1 Register x00000000 MC Error Info Register 0 xE0000000 MC Bus Trans Addr<31:4>: E0000000 MC Error Info Register 1 x000E88FD MC bus trans addr <39:32> x000000FD MC Command is Read0-IO CPU0 Master at Time of Error Device ID 2 x00000002 CAP Error Register x00000000 PCI Bus Trans Error Adr x00000000 MDPA Status Register x00000000 MDPA Status Register Data Not Valid MDPA Error Syndrome Reg x00000000 MDPA Syndrome Register Data Not Valid MDPB Status Register x00000000 MDPB Status Register Data Not Valid MDPB Error Syndrome Reg x00000000 MDPB Syndrome Register Data Not Valid ** IOD SUBPACKET -> ** IOD 1 Register Subpacket WHOAMI x000006FA Module Revision 1. VCTY ASIC Rev = 1 Bcache Size = 4MB CPU = 0 This Bus Bridge Phy Addr x000000FBE0000000 IOD# 1 Dev Type & Rev Register x06000332 CAP Chip Revision: x00000002 B3040 Revision: x00000003 B3050 Revision: x00000003 AlphaServer 4100 MC-PCI Command Register x46480FF1 Module Self-Test Passed LED On. Delayed PCI Bus Reads Protocol: Enabled Bridge to PCI Transactions: Enabled Bridge REQUESTS 64 Bit Data Transactions Bridge ACCEPTS 64 Bit Data Transactions PCI Address Parity Check: Enabled MC Bus CMD/Addr Parity Check: Enabled MC Bus NXM Check: Enabled Check ALL Transactions for Errors Use MC_BMSK for 16 Byte Align Blk Mem Wrt Wrt PEND_NUM Threshold: 8. RD_TYPE Memory Prefetch Algorithm: Short RL_TYPE Mem Rd Line Prefetch Type: Medium RM_TYPE Mem Rd Multiple Cmd Type: Long ARB_MODE PCI Arbitration: Round Robin Mem Host Address Ext Reg x00000000 HAE Sparse Mem Adr<31:27> x00000000 IO Host Adr Ext Register x00000000 PCI Upper Adr Bits<31:25> x00000000 Interrupt Ctrl Register x00000003 Write Device Interrupt Info Struct:Enabled Interrupt Request x00800000 Interrupts asserted x00000000 Hard Error Interrupt Mask0 Register x00C51111 Interrupt Mask1 Register x00000000 MC Error Info Register 0 xE0000000 MC Bus Trans Addr<31:4>: E0000000 MC Error Info Register 1 x000E88FD MC bus trans addr <39:32> x000000FD MC Command is Read0-IO CPU0 Master at Time of Error Device ID 2 x00000002 CAP Error Register x00000012 Serious error PCI error address reg locked PCI Bus Trans Error Adr xC08E10AC MDPA Status Register x00000000 MDPA Status Register Data Not Valid MDPA Error Syndrome Reg x00000000 MDPA Syndrome Register Data Not Valid MDPB Status Register x00000000 MDPB Status Register Data Not Valid MDPB Error Syndrome Reg x00000000 MDPB Syndrome Register Data Not Valid PALcode Revision Palcode Rev: 1.21-24 ** PCI SUBPACKET -> ** PCI 1 Subpacket Node Qty 5. CONFIG Address x000000FBC0000800 Slot or Device Number: 1 Device and Vendor ID x00011000 NCR 53C810 NCR_810 SCSI Narrow SingleEnded Vendor ID: x1000 (NCR) Device ID: x00000001 Command Register x0147 I/O Space Accesses Response: Enabled Memory Space Accesses Response: Enabled PCI Bus Master Capability: Enabled Monitor for Special Cycle Ops: DISABLED Generate Mem Wrt/Invalidate Cmds: DISABLED Parity Error Detection Response: Normal Wait Cycle Address/Data Stepping: DISABLED SERR# Sys Err Driver Capability: Enabled Fast Back-to-Back to Many Target: DISABLED Status Register x0200 Device is 33 Mhz Capable. No Support for User Defineable Features. Fast Back-to-Back to Different Targets, Is Not Supported in Target Device. Device Select Timing: Medium. Revision ID x02 Device Class Code x010000 Mass Storage: SCSI Bus Controller Cache Line S x00 Latency T. xFF Header Type x00 Single Function Device Bist x00 Base Address Register 1 x01FFCE00 Base Address Register 2 x07CC4E00 Base Address Register 3 x00000000 Base Address Register 4 x00000000 Base Address Register 5 x00000000 Base Address Register 6 x00000000 Expansion Rom Base Addres x00000000 Interrupt P1 x04 Interrupt P2 x01 Min Gnt x00 Max Lat x00 CONFIG Address x000000FBC0001000 Slot or Device Number: 2 Device and Vendor ID x00011069 Mylex DAC960 KZPSC RAID Controller Vendor ID: x1069 (Mylex) Device ID: x00000001 Command Register x0147 I/O Space Accesses Response: Enabled Memory Space Accesses Response: Enabled PCI Bus Master Capability: Enabled Monitor for Special Cycle Ops: DISABLED Generate Mem Wrt/Invalidate Cmds: DISABLED Parity Error Detection Response: Normal Wait Cycle Address/Data Stepping: DISABLED SERR# Sys Err Driver Capability: Enabled Fast Back-to-Back to Many Target: DISABLED Status Register xC200 Device is 33 Mhz Capable. No Support for User Defineable Features. Fast Back-to-Back to Different Targets, Is Not Supported in Target Device. Device Select Timing: Medium. SIGNALED SYSTEM ERROR: This Device has Set A System Error on SERR# Line. DETECTED PARITY ERROR:This Device Detected Revision ID x02 Device Class Code x010400 Mass Storage: RAID Controller Cache Line S x10 Latency T. xFF Header Type x00 Single Function Device Bist x00 Base Address Register 1 x01FFCF00 Base Address Register 2 x07CC4F00 Base Address Register 3 x00000000 Base Address Register 4 x00000000 Base Address Register 5 x00000000 Base Address Register 6 x00000000 Expansion Rom Base Addres x07CC8000 Interrupt P1 x08 Interrupt P2 x01 Min Gnt x04 Max Lat x00 CONFIG Address x000000FBC0001800 Slot or Device Number: 3 Device and Vendor ID x00081011 DEC_KZPSA Fast-Wide-Differential SCSI Vendor ID: x1011 (Digital Equip Corp) Device ID: x00000008 Command Register x0147 I/O Space Accesses Response: Enabled Memory Space Accesses Response: Enabled PCI Bus Master Capability: Enabled Monitor for Special Cycle Ops: DISABLED Generate Mem Wrt/Invalidate Cmds: DISABLED Parity Error Detection Response: Normal Wait Cycle Address/Data Stepping: DISABLED SERR# Sys Err Driver Capability: Enabled Fast Back-to-Back to Many Target: DISABLED Status Register xC2C0 Device is 33 Mhz Capable. Device Supports User Defineable Features. Fast Back-to-Back to Different Targets, Is Supported in Target Device. Device Select Timing: Medium. SIGNALED SYSTEM ERROR: This Device has Set A System Error on SERR# Line. DETECTED PARITY ERROR:This Device Detected Revision ID x00 Device Class Code x010000 Mass Storage: SCSI Bus Controller Cache Line S x10 Latency T. xFF Header Type x00 Single Function Device Bist x80 Base Address Register 1 x07CC5000 Base Address Register 2 x00000000 Base Address Register 3 x01FFD000 Base Address Register 4 x07D00000 Base Address Register 5 x00000000 Base Address Register 6 x00000000 Expansion Rom Base Addres x07CD0000 Interrupt P1 x0C Interrupt P2 x01 Min Gnt x08 Max Lat x7F CONFIG Address x000000FBC0002000 Slot or Device Number: 4 Device and Vendor ID x00081011 DEC_KZPSA Fast-Wide-Differential SCSI Vendor ID: x1011 (Digital Equip Corp) Device ID: x00000008 Command Register x0147 I/O Space Accesses Response: Enabled Memory Space Accesses Response: Enabled PCI Bus Master Capability: Enabled Monitor for Special Cycle Ops: DISABLED Generate Mem Wrt/Invalidate Cmds: DISABLED Parity Error Detection Response: Normal Wait Cycle Address/Data Stepping: DISABLED SERR# Sys Err Driver Capability: Enabled Fast Back-to-Back to Many Target: DISABLED Status Register xC2C0 Device is 33 Mhz Capable. Device Supports User Defineable Features. Fast Back-to-Back to Different Targets, Is Supported in Target Device. Device Select Timing: Medium. SIGNALED SYSTEM ERROR: This Device has Set A System Error on SERR# Line. DETECTED PARITY ERROR:This Device Detected Revision ID x00 Device Class Code x010000 Mass Storage: SCSI Bus Controller Cache Line S x10 Latency T. xFF Header Type x00 Single Function Device Bist x80 Base Address Register 1 x07CC6000 Base Address Register 2 x00000000 Base Address Register 3 x01FFE000 Base Address Register 4 x07E00000 Base Address Register 5 x00000000 Base Address Register 6 x00000000 Expansion Rom Base Addres x07CE0000 Interrupt P1 x10 Interrupt P2 x01 Min Gnt x08 Max Lat x7F CONFIG Address x000000FBC0002800 Slot or Device Number: 5 Device and Vendor ID x00081011 DEC_KZPSA Fast-Wide-Differential SCSI Vendor ID: x1011 (Digital Equip Corp) Device ID: x00000008 Command Register x0147 I/O Space Accesses Response: Enabled Memory Space Accesses Response: Enabled PCI Bus Master Capability: Enabled Monitor for Special Cycle Ops: DISABLED Generate Mem Wrt/Invalidate Cmds: DISABLED Parity Error Detection Response: Normal Wait Cycle Address/Data Stepping: DISABLED SERR# Sys Err Driver Capability: Enabled Fast Back-to-Back to Many Target: DISABLED Status Register xE2C0 Device is 33 Mhz Capable. Device Supports User Defineable Features. Fast Back-to-Back to Different Targets, Is Supported in Target Device. Device Select Timing: Medium. RECEIVED MASTER-ABORT:Master Sets When Its Transaction Terminated by MasterAbort. SIGNALED SYSTEM ERROR: This Device has Set A System Error on SERR# Line. DETECTED PARITY ERROR:This Device Detected Revision ID x00 Device Class Code x010000 Mass Storage: SCSI Bus Controller Cache Line S x10 Latency T. xFF Header Type x00 Single Function Device Bist x80 Base Address Register 1 x07CC7000 Base Address Register 2 x00000000 Base Address Register 3 x01FFF000 Base Address Register 4 x07F00000 Base Address Register 5 x00000000 Base Address Register 6 x00000000 Expansion Rom Base Addres x07CF0000 Interrupt P1 x14 Interrupt P2 x01 Min Gnt x08 Max Lat x7F